[Guest]

Hi everyone

I really dont know how to do this question, revising for my final,can someone guide me?I need an example to learn this,please help

Using the JK FF, design a ripple counter capable of implementing the counting sequence as below:

F(x)={0,1,2,3,4,6,7} and repeats itself

a) Explain the workings of the circuit with special emphasis on the additional circuit required to reset the counter.

b) How many bits are required to implement this counter? Show calculations to justify your answers.

c) What is the maximum frequency of the clock pulse permitted to enter this system, in order for the output to have the correct answer? Explain your answer by providing detailed calculation. (Tips: You may refer to the datasheet for the chip used to implement this function)

Thank you & regards

[Guest]

Hi everyone

I really dont know how to do this question, revising for my final,can someone guide me?I need an example to learn this,please help

Using the JK FF, design a ripple counter capable of implementing the counting sequence as below:

F(x)={0,1,2,3,4,6,7} and repeats itself

a) Explain the workings of the circuit with special emphasis on the additional circuit required to reset the counter.

b) How many bits are required to implement this counter? Show calculations to justify your answers.

c) What is the maximum frequency of the clock pulse permitted to enter this system, in order for the output to have the correct answer? Explain your answer by providing detailed calculation. (Tips: You may refer to the datasheet for the chip used to implement this function)

Thank you & regards

Okay, don't panic I remember doing problems like this in Electronics back in High School. Have to do a little research to refresh the brain. Give this post a little time as well, someone if not me will be able to help you, that I am sure of.

[Guest]

Hi everyone

I really dont know how to do this question, revising for my final,can someone guide me?I need an example to learn this,please help

Using the JK FF, design a ripple counter capable of implementing the counting sequence as below:

F(x)={0,1,2,3,4,6,7} and repeats itself

a) Explain the workings of the circuit with special emphasis on the additional circuit required to reset the counter.

b) How many bits are required to implement this counter? Show calculations to justify your answers.

c) What is the maximum frequency of the clock pulse permitted to enter this system, in order for the output to have the correct answer? Explain your answer by providing detailed calculation. (Tips: You may refer to the datasheet for the chip used to implement this function)

Thank you & regards

0 through 7 requires 3 bits and therefore 3 flipflops.

0 to 7 has states

8 = 2^3

log2(8) = 3

Here is the truth table for the JK FF where Q is output and ! means complement

J,K,Q

-----

0,0,Q

0,1,0

1,0,1

1,1,!Q

So for your counter, lets name the flip flops

FF0, FF1, and FF2

where FF0 is LSB and FF2 is MSB

Here is what the sequence looks like

000

001

010

011

100

101

110

111

Its difficult to talk about what needs to be done without a diagram.

To get the above behavior use the previous FF as a clock signal to the next most significant FF.

Other than that it is all just alternating (J=K=1).

To reset the counter, you need to set the J = 0 and K = 1 for all FF's.

You can use inverters: J = !R

If R=0, then J=K=1 and all FF's will toggle at different rates.

Summarizing connections:

FF2.CLK = FF1.Q

FF1.CLK = FF0.Q

FF0.CLK = CLK

FF2.K = 1

FF1.K = 1

FF0.K = 1

FF2.J = !R

FF1.J = !R

FF0.J = !R

For part C, just make sure there is enough time to handle propagation delay, setup and hold times for each flip flop during a single clock cycle

Edited October 5, 2010 by mmiguel1