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Guest Message by DevFuse

# Complex numbers

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Posted 26 February 2014 - 05:26 PM

Consider computing the product of two complex numbers (a + bi) and (c + di). By foiling the polynomials as we learned in grade school. We get:

a   + bi
c   + di
----------
ca + cbi
----------------
(ca - bd) + (ad + cb)i

Note that this standard method uses 4 multiplications and 2 additions to compute the product. (The plus sign in between (ca - bd) and (ad + cb)i does not count as an addition. Think of a complex number as simply a 2-tuple.)

It is actually possible to compute this complex product using only 3 multiplications and 3 additions. From a logic design perspective, this is preferable since multiplications are more expensive to implement than additions. Can you figure out how to do this?

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### #2 bonanova

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Posted 27 February 2014 - 11:06 AM

I can do it with 3 multiplications and 4 additions. Still looking.

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### #3 bonanova

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Posted 04 March 2014 - 12:17 PM

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### #4 harey

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Posted 11 March 2014 - 10:02 PM

As nobody found the solution, can you post it?
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### #5 harey

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Posted 13 March 2014 - 12:48 PM

@bonanova - sorry, but I believe you have a sign error with the factor bd:
I = (a+b)(c+d) - R =ac+bc+ad+bd - (ac - bd) ... = ... +2*bd ....

Edited by harey, 13 March 2014 - 12:50 PM.

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### #6 bonanova

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Posted 13 March 2014 - 04:14 PM

@bonanova - sorry, but I believe you have a sign error with the factor bd:
I = (a+b)(c+d) - R =ac+bc+ad+bd - (ac - bd) ... = ... +2*bd ....

Right. It's (a+b)(c+d) - ac - bd.

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Posted 13 March 2014 - 04:46 PM

Spoiler for my solution

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### #8 harey

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Posted 15 March 2014 - 03:27 PM

If our hardware uses fewer clock cycles to perform three additions than a single multiplication, we may well gain overall processing speed by using Eq. (2-4) and Eq. (2-5) instead of Eq. (1-2) for complex multiplication

If it worked, it would be great for fractal pictures. The bad news is that multiplications are in the processor heavily optimized, a fair guess 4-5 additions. Googling:

The latency is 1 cycle for an integer addition and 3 cycles for an integer multiplication. You can find the latencies and thoughput in Appendix C of the "Intel 64 and IA-32 Architectures Optimization Reference Manual", which is located on http://www.intel.com...cessor/manuals/.

The big question is how the 3 temporary variables were treated by the compiler. If we have to access the RAM...
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